Abstract: The existing public key cryptosystems such as RSA and elliptic curve cryptography play a crucial role in ensuring the confidential and authenticity of communications on the internet and other networks. However, with the rapid development of quantum computers in recent years, the security of these public-key cryptosystems would be completely broken. Due to this concern, post quantum cryptography (PQC) has attracted increasing interest for securing data privacy against potential quantum attacks. Many researchers have begun to investigate PQC to develop cryptographic algorithms that would be secure against quantum computers. The National Institute of Standards and Technology (NIST) third round submissions showed that lattice-based cryptography (LBC) schemes have become promising candidates for future standardization. In this talk, we will introduce the latticed-based PQC algorithm and discuss the design of efficient lattice-based PQC hardware architectures. We will also highlight important algorithm, software implementation, architecture design principles, and methodology that can facilitate an effective design process.

Biography: Hanho Lee is a Professor of Information and Communication Engineering at Inha University in South Korea and leads the Research Lab of Digital Integrated Systems research group (http://soc.inha.ac.kr). He received Ph.D. and M.S. degrees, both in Electrical & Computer Engineering, from the University of Minnesota, Minneapolis, USA, in 2000 and 1996, respectively. In 1999, he was a Member of Technical Staff-1 at Lucent Technologies, Bell Labs, New Jersey, USA. From April 2000 to August 2002, he was a Member of Technical Staff at the Lucent Technologies (Bell Labs Innovations), USA. From August 2002 to August 2004, he was an Assistant Professor at the Department of Electrical and Computer Engineering, University of Connecticut, USA. Since August 2004, he has been with the Department of Information and Communication Engineering, Inha University, where he is currently Professor. He was a visiting researcher at Electronics and Telecommunications Research Institute (ETRI), Korea, in 2005. From August 2010 to August 2011, he was a visiting scholar at Bell Labs, Alcatel-Lucent, New Jersey, USA. He served the Technical Program Chair of the IEEE ISCAS2021, the Secretary General of the IEEE ISCAS2012, and the Special Session Chair of ISOCC 2020. He is a Board of Governor of IEEE Circuits and Systems Society, Associate Editor in Chief of the IEEE Open Journal of Circuits and Systems and TC Chair of the IEEE CASCOM technical committee. His research interests include VLSI architectures design for cryptography, forward error correction, and digital signal processing.

Abstract: Semiconductor scientists have made much progress in recent years to overcome the scaling limitations of the CMOS transistors and to maintain historical performance trends. New innovations in materials, processes and devices are pushing CMOS transistors to their ultimate limits beyond any previous predictions. It meets the everlasting demand for higher density, more functionality, better performance per watt or energy efficient and most importantly economical solution for consumer applications and wide adoption. However CMOS scaling is slowing down after the 28nm node and not all the components of the circuits can take full benefits of scaling!

Therefore the semiconductor industry has taken another major shift towards heterogeneous 2.5D/3D integration, which enables both 2D-horizontal and 3D-vertical connections of components or chiplets in a single package. Moreover, It also allows the mix-and-match chiplet technology to meet system requirements for targeting applications such as 5G AIoT and assisted- or self-driving automotive which require complex systems with high integration level. The 2.5D approach offers opportunities to address the ever-increasing needs for low cost, high functionality, flexibility and fast time to market. Both 2.5D/3D System in Package (SiP) using copper redistribution layers, micro bumps, through-silicon-via interconnects and interposer technologies offer the opportunity to integrate multiple and mix and match IC chiplets at lower cost and faster time to market than those of monolithic ICs (SoC) and smaller silicon footprint, higher performance and lower power than conventional system-in-package.

With these demands and challenges in mind, semiconductor innovation has never been more in the center of attention as it is now!

This presentation will discuss the needs, development progress, and opportunities for innovation and collaboration in material, device and system architecture for 5G Automotive and AIoT applications into Nanometer Era.

Biography: Bich-Yen Nguyen has a very long (more than 38 years) and rich experience in microelectronics materials, technology and devices. At Motorola/Freescale she was in charge of research groups involved in the development of advanced devices and related process modules. Her pioneering contributions to high-k/metal gate stacks, SiGe, strain engineering and trench power MOSFET are worth reminding. More recently, she has been instrumental in demonstrating and promoting the Fully Depleted Silicon on Insulator (FD-SOI) for low-power and high frequency applications. She demonstrated excellent scientific expertise and charismatic leadership. She received prestigious awards for her innovations and technical/scientific activity such as the national award ‘Women in technology', ‘Dan Noble Fellow', and ‘Woman Engineer of the Year'. She co-authored more than 200 papers and 220 patents. Bich-Yen has contributed to the organization of multiple conferences (IEEE SOI conference, ECS SOI symposia, IEEE international conference on IC design and technology, etc), where she brought significant improvements. After joining SOITEC, she focused on external relations with partners and customers, including technical support for SOI materials and integrated circuits. She is one of the rare specialists I know able to cover the whole range from material synthesis and characterization to device physics and circuit design/fabrication. For this reason, she is extremely well known and appreciated by companies with existing or potential activity in SOI.

Abstract: Millimeter-wave technologies are growing for sensing and communication applications. Automotive-radar systems are the first leading application of millimeter-wave technologies. The successful growth of the automotive radar contributes the cost reduction of millimeter-wave devices. The service of the 5G mobile communication systems has already begun and currently the service area is extending from hot spots gradually. The development of the RF technologies of mobile communication systems shifts higher frequency band such as teraherz-wave band for Beyond 5G systems toward 2030 as a next stage.

High gain antennas for high S/N ratio and high angular resolution can be designed in the millimeter-wave and teraherz-wave bands even though the physical size of the antenna is small. Beam-scanning function is attractive to detect the target in sensing systems and to cover wide area with high gain in communication systems. Digital Beam Forming (DBF) systems are being the most popular for automotive radar systems. Required gain of the antenna for one channel is relatively low. However, full DBF systems require huge number of receivers and consume much power in A/D and D/A converters. Combination techniques of DBF and multiple beam antennas could be a solution of reasonable high-gain beam-scanning antennas. Technologies of planar array antennas and multiple beam antennas are required for these applications.

Three "LOWs"; low loss, low cost and low profile are important features in choosing the feeding system of array antennas. There are no perfect antennas for any uses. We always have to select feeding systems with distinct advantages depending on the specification. How many millimeter-wave antennas should be prepared to cover all millimeter-wave applications? Three types of millimeter-wave antennas are enough to cover most applications; microstrip array antennas, slotted waveguide array antennas, lens antennas since they have completely opposite advantages and compensate their disadvantages each other. Therefore, we have tried development of various designs of these antennas. Butler matrix and Rotman lens are popular for feeding circuit of multiple beam antennas. The dielectric lens antennas can be applied for beam-scanning antennas.

Broadband antennas which cover wide angular area with high gain are expected for high-speed huge-capacity wireless communication systems and wireless sensing systems in 300GHz band. Lens antennas perform low feeding loss even for high gain in such a frequency range. Electric beam-scanning is possible by switching primary radiators arranged around the focus of the lens. To prevent reducing crossover levels in beam switching of the lens antenna, two ideas are proposed as feeding two primary radiators simultaneously and arranging smaller lenses with phase synthesis.

This lecture presents the distinct features of the planar antennas, multiple beam antennas and lens antennas. The designs and the principles of the antennas are explained. The key technologies of the planar array antennas and the lens antennas for beam-scanning in the millimeter-wave and teraherz-wave bands are presented in the lecture. Transmission line transitions to connect RFIC and waveguide feeding horn antennas for primary radiators of lens antennas are also mentioned in this talk.

Biography: Kunio Sakakibara was born in Aichi, Japan, on November 8, 1968. He received the B.S. degree in electrical and computer engineering from Nagoya Institute of Technology, Nagoya, Japan, in 1991, and the M.S. and D.E. degrees in electrical and electronic engineering from Tokyo Institute of Technology, Tokyo, Japan in 1993 and 1996, respectively. From 1996 to 2002, he worked at TOYOTA CENTRAL R&D LABS., INC., Aichi, and was engaged in the development of antennas for automotive millimeter-wave radar systems. From 2000 to 2001, he was with the Department of Microwave Techniques at the University of Ulm, Ulm, Germany, as a Guest Researcher.

In 2002, he joined Nagoya Institute of Technology as a Lecturer. From 2004, he was an Associate Professor and he became a Professor in 2012. He was an associate editor of IEICE Transactions on Communications from 2010 to 2015 and is currently an associate editor of the Korean Journal of Electromagnetic Engineering and Science (JEES) from 2012. He was awarded for Top Ten Reviewers from IEEE Transactions on Antennas and Propagation in 2010. He received Best Paper Award of ISAP in 2004, 2007, 2008 and 2009. His research interest has been millimeter-wave antennas and metasurfaces. Dr. Sakakibara has been senior members of IEEE since 2006 and IEICE since 2011.